1. Field of the Invention
The present invention relates to a technology involving a substrate of a semiconductor package which is suitable for mounting a semiconductor element. In particular, the present invention relates to a substrate for a semiconductor element, a method for manufacturing a substrate for a semiconductor element, and a semiconductor device.
2. Description of the Related Art
A semiconductor package using a lead frame is represented by QFP (Quad Flat Package). According to such a semiconductor package, an outer lead is placed at a side surface of the semiconductor package. The outer lead is used for making a connection with a print wiring substrate. According to this lead frame, a desired photoresist pattern is formed on both surfaces of a metallic plate. Then, an etching is performed from both surfaces. As a result, an inner lead, an outer lead, and an outer frame part are obtained. The inner lead and the outer lead are connecting parts between a semiconductor element mounting part and a semiconductor element electrode. The outer frame part fixes the inner lead and the outer lead.
In addition, other than the etching operation, the lead frame may be obtained by performing a punching operation by a press. The semiconductor package is assembled by dye-bonding a semiconductor element to a semiconductor element mounting part, and using a metallic wire to electrically connect the electrode of the semiconductor element and the inner lead. Thereafter, an area near the semiconductor element including the inner lead part is sealed by resin. Then, the outer frame part is cut. If necessary, a bending operation is performed on the outer lead.
In this way, according to an outer lead provided on a side surface, with a package size of approximately 30 mm square, a range of 200 to 300 pins is considered to be a limit from the standpoint of the capability of performing a process to achieve miniaturization.
In recent years, the number of electrodes of the semiconductor element has increased. As a result, according to a semiconductor package of a lead frame type having an outer lead at a side surface, the number of terminals has become inadequate for handling. Therefore, partially, a substitution has been made to a semiconductor package such that an external connection terminal with a print wiring substrate is positioned in an array-form at a bottom surface of the package substrate. The type of this print wiring substrate is a BGA (Ball Grid Array) type or an LGA (Land Grid Array) type. In general, a substrate used in this configuration is formed by drilling a hole on a glass epoxy substrate with a drill, plating the interior of the hole and achieving conductivity, forming a terminal on one surface to make a connection with an electrode of a semiconductor element, and by forming an external connection terminal on the other surface, Here, both surfaces of the glass epoxy substrate are clad with copper. The external connection terminal is aligned in an array form.
However, the manufacturing of these substrates is problematic because the steps are complicated, the cost becomes high. In addition, there is a decline in reliability compared to a lead frame type package, because a plating is used in the wiring connection within the substrate.
Therefore, using a step in which an etching is performed on the lead frame from both surfaces, a semiconductor package of a BGA type using a lead frame is disclosed (See, for example, Japanese Patent No. 3642911).
According to this configuration, a pattern of a photoresist at the front and back surfaces is altered, and an etching process is performed simultaneously, or, after an etching is performed on one side, an electrocoat polyimide resin layer is formed on a front surface of the etching surface, or, after a premolding resin is applied, an etching process is performed from another surface, thereby forming a connection terminal of a semiconductor element electrode at one surface, and forming an external connection terminal in an array form on the other surface.
FIGS. 11 and 12 show a conventional semiconductor element substrate. The semiconductor element substrate includes a wiring 110, an external connection terminal 111, an outer frame part 112, a polyimide resin layer 116, a semiconductor element mounting part 118, and a semiconductor element electrode connection terminal 119. As shown in FIG. 11 and FIG. 12, according to a lead frame of a BGA type, when the number of external connection terminals 111 increases, the length of the wiring 110 at a semiconductor element electrode connection terminal 119 side becomes longer. This wiring 110 is created by performing a half etching on a metallic plate. There is a problem in that the width and the thickness are both small, a folding or a bending occurs in a step after the etching, thereby causing an extreme decline in the yield.
According to Japanese Patent No. 3642911, first, a half etching is performed only on a side of the external connection terminal 111. An electrocoat polyimide resin layer is formed on the etching surface. Then, a semiconductor element electrode connection terminal 119 side is formed by etching. As a result, a fine wiring 110 is supported by a polyimide resin layer 116, although this layer is a thin film, and the folding and bending of the wiring at the time the lead frame is manufactured is prevented.
However, when a semiconductor element is mounted on the semiconductor element substrate having the present structure, and when the semiconductor element electrode and the connection terminal 119 are connected by wire bonding, the lower portion of the connection terminal 119 is hollow. As a result, there is a problem in that a force of the wiring connection is not applied, a connection defect occurs, and the assembly yield is greatly reduced.
According to Japanese Patent No. 3642911, it is presumed that the problem of the bonding defect may be prevented to a certain degree by filling in a premolding resin instead of an electrocoat polyimide resin layer. However, there is a problem in that, when a premolding resin filled into the concaved part is hardened, the resin contracts, and an adhesion force of the resin and the outer frame becomes weaker than the contracting force of the resin, thereby causing an abrasion.
An object of the present invention is to provide a semiconductor element substrate which can respond to an increase in the number of electrodes of the semiconductor element, has greater reliability, and allows a manufacturing and an assembling of the semiconductor package to be performed in a stable manner. An object of the present invention is also to provide a method of manufacturing the semiconductor element substrate. An object of the present invention is to also provide a semiconductor device.